How Zynq SoCs handle external peripherals like sensors, displays, and storage.
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How Zynq SoCs handle external peripherals like sensors, displays, and storage.

Publish Date: May 16
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Zynq System-on-Chip (SoC) devices (such as those in the Xilinx Zynq-7000 and Zynq UltraScale+ MPSoC families) combine ARM Cortex processors with FPGA fabric, enabling flexible handling of external peripherals like sensors, displays, and storage. Here’s how they manage different types of peripherals:

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1. Peripherals Connected via Processor (PS Side)
The Processing System (PS) includes ARM cores with standard interfaces for common peripherals:

Low-speed interfaces (I²C, SPI, UART, GPIO)

  • Used for sensors (temperature, accelerometers), EEPROMs, and simple displays.
  • Example: An I²C temperature sensor (like LM75) connects directly to the PS I²C controller.

USB, SD/SDIO, Ethernet

Storage (USB flash drives, SD cards) and networking (Ethernet PHY) are handled by dedicated PS controllers.

Display Interfaces (HDMI, DisplayPort, Parallel RGB)

  • Some Zynq chips have built-in display controllers (e.g., Xylon LCD controller in PS).
  • Example: A 7-inch LCD might connect via the FMC connector using RGB888.

2. Peripherals Connected via FPGA (PL Side)
The Programmable Logic (PL) is used for high-speed or custom interfaces:

High-speed sensors (Camera, ADC, DAC)

  • Example: A CMOS camera sensor (OV5640) connects via MIPI CSI-2 (implemented in PL).
  • Custom ADC/DAC interfaces (like JESD204B) are implemented in PL for high-speed data.

Custom Protocols (Ethernet 10G, PCIe, SATA, CAN FD)

Example: A 10G Ethernet MAC can be implemented in PL using Xilinx IP cores.

Memory-Mapped Peripherals (AXI)

Custom IP cores (e.g., PWM for motor control) connect via AXI4-Lite/AXI4-Stream.

3. Shared PS-PL Interfaces (AXI, DMA, Interrupts)
AXI Interconnect

  • The PS and PL communicate via AXI buses (AXI4, AXI4-Lite, AXI4-Stream).
  • Example: A DMA engine in PL streams sensor data to DDR memory via AXI HP ports.

Interrupts

PL peripherals can trigger PS interrupts via the Generic Interrupt Controller (GIC).

GPIO Expansion

PS GPIOs can be extended into PL for additional control signals.

4. Storage Options
SD Card (PS-connected)

Boots Linux from EXT4/FAT32 partitions.

QSPI Flash (PS-connected)

Stores FSBL (First Stage Bootloader) and bitstream.

SATA/NVMe (PL-connected)

High-speed storage via PL-based SATA or PCIe IP cores.

DDR Memory (PS-connected)

Used for runtime data (Linux apps, FPGA buffers).

5. Example Use Cases

  1. Sensor Hub

I²C/SPI sensors (PS) + FPGA-accelerated filtering (PL).

  1. Video Processing

HDMI input (PL) → H.264 encode (PS GPU/NEON) → Ethernet (PS).

  1. High-Speed DAQ

ADC (PL JESD204B) → DDR → Linux (PS) via DMA.

6. Tools & Software

  • Vivado → Configures PS peripherals & PL logic.
  • PetaLinux → Builds Linux with drivers for PS peripherals.
  • Xilinx SDK/Vitis → Develops bare-metal/RTOS apps.

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